| Title | A Methodology for Efficient Tile Size Selection for Affine Loop Kernels |
|---|---|
| DOI | https://doi.org/10.1007/s10766-022-00734-5 |
| Raw Affiliation | Electrical & Computer Engineering Department, University of Peloponnese, Patras, Greece |
| Clean Page Target | Electrical & Computer Engineering Department, University of Peloponnese, Patras, Greece |