RISER: Difference between revisions
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==[[EU Project short name:: | ==[[EU Project short name::Riser]]== | ||
===[[EU Project full name::RISC-V for Cloud Services]]=== | ===[[EU Project full name::RISC-V for Cloud Services]]=== | ||
'''Full project details (EU Research results portal):''' [[CORDIS URL::https://cordis.europa.eu/project/id/101092993]] | '''Full project details (EU Research results portal):''' [[CORDIS URL::https://cordis.europa.eu/project/id/101092993]] | ||
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'''EU Programme:''' | '''EU Programme:''' | ||
[[Programme::Horizon Europe]] | [[Programme::Horizon Europe]] | ||
[[ItemType::EU Project]] | |||
'''Project publications:''' | |||
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Latest revision as of 13:18, 8 May 2026
Riser edit edit source
RISC-V for Cloud Services edit edit source
Full project details (EU Research results portal): https://cordis.europa.eu/project/id/101092993
Project description: edit edit source
Building on top of outcomes from the EPI and EUPilot projects, RISER will develop the first all-European RISC-V cloud server infrastructure, significantly enhancing Europe's open strategic autonomy. RISER will leverage and validate open hardware high-speed interfaces combined with a fully-featured operating system environment and runtime system, enabling the integration of low-power components, including the RISC-V processor chips from EPI and EUPilot and LPDDR4 memories, in a novel energy-efficient cloud architecture.RISER brings together a set of 7 partners from industry and academia to jointly develop and validate open-source designs for standardized form-factor system platforms suitable for supporting cloud services. Specifically, RISER will build the following two cloud infrastructures:(1) An accelerator platform, which includes the ARM-based RHEA processor from EPI and a PCIe acceleration board that will be developed within the project which will integrate up-to four RISC-V based EPI and EUPilot chips.(2) A microserver platform, which interconnects up to ten microserver boards all developed by the project, each one supporting up to four RISC-V chips coupled with high-speed storage and networking. Embracing hyperconvergence, the microserver architecture will allow for distributed storage and memory to be used by any processor in the system with very low overhead.The open-source system board designs of RISER will also be accompanied by open-source low-level firmware and systems software, and a representative Linux-based software stack to support cloud services. To evaluate and demonstrate the capabilities of the RISER platforms we will develop three use cases: (a) Acceleration of compute workloads, (b) Networked object and key-value storage, and (c) Containerized execution as part of a provider-managed IaaS environment. RISER will offer open access to the microserver platform, facilitating uptake and enhancing the commercialization path of project results.
EuroVoc IDs: /natural sciences/computer and information sciences/software
EU Programme: Horizon Europe
EU Project
Project publications:
| EU Project | Has Title | Has Category | Has Type | Has Year | Has DOI |
|---|---|---|---|---|---|
| RISER | RISER: The first All- European RISC-V Cloud Server Infrastructure | Hardware Architecture and High-Performance Computing (HPC) | Peer reviewed articles | 2023 | https://doi.org/10.5281/zenodo.8099918 |
| RISER | Short Reasons for Long Vectors in HPC CPUs: A Study Based on RISC-V | Hardware Architecture and High-Performance Computing (HPC) | Conference proceedings | https://doi.org/10.1145/3624062.3624231 |